The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2010

Filed:

Nov. 16, 2006
Applicants:

Yuri Ikeda, Tokyo, JP;

Yoshikazu Aoto, Tokyo, JP;

Jun Matsushima, Tokyo, JP;

Hiroyuki Sasaki, Tokyo, JP;

Tomoyoshi Ujii, Tokyo, JP;

Makoto Saen, Tokyo, JP;

Inventors:

Yuri Ikeda, Tokyo, JP;

Yoshikazu Aoto, Tokyo, JP;

Jun Matsushima, Tokyo, JP;

Hiroyuki Sasaki, Tokyo, JP;

Tomoyoshi Ujii, Tokyo, JP;

Makoto Saen, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is directed to facilitate debugging in a semiconductor integrated circuit device including a plurality of microprocessors. A semiconductor integrated circuit device includes: a plurality of processors; a plurality of debug interfaces enabling debugging of the corresponding processors; a plurality of common terminals shared by the plurality of debug interfaces; a selection circuit capable of selectively connecting the plurality of debug interfaces to the common terminals; and a controller capable of controlling selecting operation in the selection circuit in accordance with a predetermined instruction. A first selector capable of selectively connecting the plurality of debug interfaces to a TRST terminal in the terminal group conformed with the JTAG specifications, and a second selector capable of selectively connecting the plurality of debug interfaces to terminals other than the TRST terminal are provided. With the configuration, even in the case where the number of processors increases, the invention can flexibly address the increase.


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