The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2010

Filed:

Dec. 17, 2007
Applicant:

Eric H. Voelkel, Ben Lomond, CA (US);

Inventor:

Eric H. Voelkel, Ben Lomond, CA (US);

Assignee:

SuVolta, Inc., Los Gatos, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for operating an SRAM cell comprises, during a read operation, forward biasing an N-well of a first and second pull-up transistor, and forward biasing a P-well of a first and second pull-down transistor and a first and second access transistor. The method further comprises, during a write operation, zero or reverse biasing an N-well of a first and second pull-up transistor, and forward biasing a P-well of a first and second pull-down transistor and a first and second access transistor. The method further comprises, during an idle state, zero biasing an N-well of a first and second pull-up transistor and zero biasing a P-well of a first and second pull-down transistor and a first and second access transistor. In addition, one or more rows or columns of memory cells may receive a bias voltage.


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