The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2010
Filed:
Dec. 13, 2007
Applicant:
Yoshifumi Mochida, Tokyo, JP;
Inventor:
Yoshifumi Mochida, Tokyo, JP;
Assignee:
Elpida Memory, Inc., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A mode decode/latch circuit decodes an input signal based on a latch timing signal to output a test mode signal to a test execution circuit. Test mode signal line includes a high-resistance portion extending from the mode decode/latch circuit toward the vicinity of the test execution circuit and a low-resistance portion connecting together the distal end of the high-resistance portion and the input of the test execution circuit. A latch circuit for latching the test mode signal based on the latch timing signal is inserted in the low-resistance portion.