The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2010

Filed:

Dec. 12, 2007
Applicants:

Hiroki Shimano, Tokyo, JP;

Fukashi Morishita, Tokyo, JP;

Kazutami Arimoto, Tokyo, JP;

Inventors:

Hiroki Shimano, Tokyo, JP;

Fukashi Morishita, Tokyo, JP;

Kazutami Arimoto, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

One memory cell is formed of a first port access transistor, a second port access transistor and a storage transistor coupled commonly to these access transistors. The first port access transistor is coupled to a first electrode of the storage transistor, and the second port access transistor is coupled to a third electrode of the storage transistor. These first and second port access transistors enter a selected state when first and second port word lines are selected, respectively, to couple corresponding second and third electrodes of the corresponding storage transistor to first and second port bit lines, respectively. A dual-port memory cell of which scalability can follow miniaturization in a process can be provided.


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