The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 15, 2010
Filed:
Oct. 25, 2006
John Brothers, Calistoga, CA (US);
Timour Paltashev, Fremont, CA (US);
Hsilin Huang, Cupertino, CA (US);
Boris Prokopenko, Milpitas, CA (US);
Qunfeng (Fred) Liao, San Jose, CA (US);
John Brothers, Calistoga, CA (US);
Timour Paltashev, Fremont, CA (US);
Hsilin Huang, Cupertino, CA (US);
Boris Prokopenko, Milpitas, CA (US);
Qunfeng (Fred) Liao, San Jose, CA (US);
Via Technologies, Inc., Hsin-Tien, Taipei, TW;
Abstract
A method for high level synchronization between an application and a graphics pipeline comprises receiving an application instruction in an input stream at a predetermined component, such as a command stream processor (CSP), as sent by a central processing unit. The CSP may have a first portion coupled to a next component in the graphics pipeline and a second portion coupled to a plurality of components of the graphics pipeline. A command associated with the application instruction may be forwarded from the first portion to the next component in the graphics pipeline or some other component coupled thereto. The command may be received and thereafter executed. A response may be communicated on a feedback path to the second portion of the CSP. Nonlimiting exemplary application instructions that may be received and executed by the CSP include check surface fault, trap, wait, signal, stall, flip, and trigger.