The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2010

Filed:

Aug. 09, 2006
Applicants:

Yipeng Chan, Shanghai, CN;

Shenghe Huang, Shanghai, CN;

Jing LU, Shanghai, CN;

Inventors:

YiPeng Chan, Shanghai, CN;

ShengHe Huang, Shanghai, CN;

Jing Lu, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
Abstract

A structure and a manufacturing method for an OTP-EPROM in an embedded EEPROM integrated circuit structure. The structure has a substrate that includes a surface region. The structure has a gate dielectric is overlying the surface region. The structure also a first OTP-EPROM gate overlying the gate dielectric layer in a first cell region, and an EEPROM floating gate and a select gate overlying the gate dielectric layer in a second cell region. An insulating layer is overlying the first OTP-EPROM gate, the EEPROM floating gate and the select gate. An OTP-EPROM control gate is overlying the insulating layer and coupled to the first OTP-EPROM gate. An EEPROM control gate is overlying the insulating layer and coupled to the EEPROM floating gate.


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