The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2010
Filed:
Jun. 24, 2005
James W. Alexander, Aloha, OR (US);
Suresh Chittor, Beaverton, OR (US);
Dennis W. Brzezinski, Sunnyvale, OR (US);
Kai Cheng, Portland, OR (US);
Rajat Agarwal, Beaverton, OR (US);
James W. Alexander, Aloha, OR (US);
Suresh Chittor, Beaverton, OR (US);
Dennis W. Brzezinski, Sunnyvale, OR (US);
Kai Cheng, Portland, OR (US);
Rajat Agarwal, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments of the invention are generally directed to systems, apparatuses, and methods for mitigating silent data corruption in a fully-buffered memory module architecture. In an embodiment, a memory controller includes a memory channel bit-lane error detector having an M-bit CRC and N-bit CRC, wherein N is less than M. The N-bit CRC is used if at least one bit-lane of the memory channel fails. In one embodiment, the memory controller selectively applies the strong error detection capability of an error correction code (ECC) in combination with the N-bit CRC to signal the need to resend faulty data, if at least one bit-channel has failed. Other embodiments are described and claimed.