The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2010
Filed:
Dec. 20, 2007
Ju-ai Ruan, Plano, TX (US);
Sameer K. Ajmera, Richardson, TX (US);
Changming Jin, Plano, TX (US);
Anand J. Reddy, Palo Alto, CA (US);
Tae S. Kim, Dallas, TX (US);
Ju-Ai Ruan, Plano, TX (US);
Sameer K. Ajmera, Richardson, TX (US);
Changming Jin, Plano, TX (US);
Anand J. Reddy, Palo Alto, CA (US);
Tae S. Kim, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
One aspect of the invention provides a method of forming a semiconductor device (). One aspect includes forming transistors () on a semiconductor substrate (), forming a first interlevel dielectric layer () over the transistors (), and forming metal interconnects () within the first interlevel dielectric layer (). A carbon-containing gas is used to form a silicon carbon nitride (SiCN) layer () over the metal interconnects () and the first interlevel dielectric layer () within a deposition tool. An adhesion layer () is formed on the SiCN layer (), within the deposition tool, by discontinuing a flow of the carbon-containing gas within the deposition chamber. A second interlevel dielectric layer () is formed over the adhesion layer ().