The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 2010

Filed:

Feb. 11, 2008
Applicants:

Tuyet Ngoc Simmons, Monte Sereno, CA (US);

Brian Sadler, San Jose, CA (US);

Michael Leonard Simmons, Monte Sereno, CA (US);

Andrew W. Lai, Fremont, CA (US);

Inventors:

Tuyet Ngoc Simmons, Monte Sereno, CA (US);

Brian Sadler, San Jose, CA (US);

Michael Leonard Simmons, Monte Sereno, CA (US);

Andrew W. Lai, Fremont, CA (US);

Assignee:

XILINX, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); G01R 31/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A test setup is provided to test differential signals outputs from the I/O block (IOB) pairs in an integrated circuit (IC). The test setup allows elimination of the external 100 Ohm resistors provided across the differential outputs on a device under test (DUT) test board containing the IC by taking advantage of a 100 Ohm resistor built into the IC between a portion of the IOB pairs. An IOB pair being tested may have its differential output terminal pair shorted to the differential output terminal pair of the IOBs having the internal 100 Ohm resistor.


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