The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 01, 2010
Filed:
Jul. 22, 2008
Joze Eura Antol, Hamburg, PA (US);
Kishor V. Desai, Fremont, CA (US);
John William Osenbach, Kutztown, PA (US);
Brian Thomas Vaccaro, Mertztown, PA (US);
Joze Eura Antol, Hamburg, PA (US);
Kishor V. Desai, Fremont, CA (US);
John William Osenbach, Kutztown, PA (US);
Brian Thomas Vaccaro, Mertztown, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
Typical testing of solder joints, (e.g. joints at printed circuit board pads) has not proven totally predictive of the ultimate performance of such joints. It has been found that this lack of reliability is, at least in part, due to the tendency during testing for these pads to lose adhesion to, or delaminate from, the underlying substrate. In contrast, such occurrence is not typical of phenomena induced during typical device usage. To remove this source of unreliability, a test structure is made together with the manufacturing device lot. The same pad processing is used and the pad size is substantially enlarged in the test structure. The test structure is employed to predict performance of devices in the lot and then the lot is processed accordingly.