The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 25, 2010
Filed:
Dec. 08, 2008
Seiji Funaba, Kokubunji, JP;
Yoji Nishio, Higashimurayama, JP;
Seiji Funaba, Kokubunji, JP;
Yoji Nishio, Higashimurayama, JP;
Elpida Memory, Inc., Tokyo, JP;
Abstract
A dummy wiringis provided for simulating an actual wiringconnecting semiconductor integrated circuitsandon a circuit board. The semiconductor integrated circuit comprises a data output circuitcapable of variably setting the slew rate and a circuitfor measuring signal delay time between a signal sending point and a signal reflection point (characteristic impedance mismatching point) using the dummy wiring, and the delay time so obtained by the measuring circuit is used for the determination of the signal transition time of the output circuit. The transition time of the signal is set at least twice of the signal delay time between the signal sending point and the wiring branch at the nearest end. In this way, signal transmission with alleviated reflection by the reflection point at the nearest end is realized.