The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2010

Filed:

Sep. 12, 2005
Applicants:

Osamu Ikawa, Nagano, JP;

Eiji Mochizuki, Nagano, JP;

Masayuki Soutome, Nagano, JP;

Norio Arikawa, Nagano, JP;

Inventors:

Osamu Ikawa, Nagano, JP;

Eiji Mochizuki, Nagano, JP;

Masayuki Soutome, Nagano, JP;

Norio Arikawa, Nagano, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/12 (2006.01); H01L 23/495 (2006.01); H01L 23/48 (2006.01); H01L 23/14 (2006.01); H01L 23/10 (2006.01); H01L 23/34 (2006.01); H01L 23/52 (2006.01); H01L 23/40 (2006.01); H01L 23/498 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
Abstract

A power semiconductor module and a method of manufacture thereof includes a lead frame carrying lead having inner and outer lead portions. The outer lead portions, which are connected by soldering to semiconductor chips simultaneously, eliminate the need for using bonding wires. Since no bonding wire is used for connecting the leads and the semiconductor chips, a sufficient current capacity is obtained. The bonding between an insulating circuit board and the semiconductor chips and the bonding between the semiconductor chips and the leads can be made simultaneously in a single step of reflow-soldering. As a result, the mounting time can be shortened and the power semiconductor module can be manufactured more efficiently.


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