The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2010
Filed:
May. 27, 2005
Douglas Brisbin, San Jose, CA (US);
Prasad Chaparala, Sunnyvale, CA (US);
Douglas Brisbin, San Jose, CA (US);
Prasad Chaparala, Sunnyvale, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A number of modified lateral DMOS (LDMOS) transistor arrays are formed and tested to determine if a measured value, such as a series on-resistance, substrate current, breakdown voltage, and reliability, satisfies process alignment requirements. The modified LDMOS transistor arrays are similar to standard LDMOS transistor arrays such that the results of the modified LDMOS transistor arrays can be used to predict the results of the standard LDMOS transistor arrays.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile