The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2010

Filed:

Jul. 26, 2002
Applicant:

John Tang, Phoenix, AZ (US);

Inventor:

John Tang, Phoenix, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/053 (2006.01); H01L 23/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device is provided that includes one or more ceramic material layers and one or more low dielectric constant (low-K) epoxy layers on top to be electrically coupled to an integrated circuit device, such as a chip die. The resulting ceramic/organic hybrid substrate takes advantage of the thin low-cost, low-K epoxy layer, by routing the dense circuitry from the chip die to the ceramic material layer. In addition, the use of low-K epoxy layer may reduce the number of ceramic material layers required to about three layers, thus significantly reducing the cost of the substrate. Low-K epoxy material layer may be laminated onto the ceramic material layer to reduce throughput time and cost. The ceramic/organic hybrid substrate may also take advantage of the properties of ceramic materials, which have a much more rigid structure than organic materials and a low CTE (coefficient of thermal expansion) that works well with ultra low-K chip dies. The ceramic/organic hybrid substrate also may make possible the fabrication of a bottom cavity package for capacitors placement.


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