The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2010

Filed:

Jul. 05, 2007
Applicants:

Katsuaki Natori, Yokohama, JP;

Masayuki Tanaka, Yokohama, JP;

Katsuyuki Sekine, Yokohama, JP;

Hirokazu Ishida, Yokohama, JP;

Masumi Matsuzaki, Yokohama, JP;

Yoshio Ozawa, Yokohama, JP;

Inventors:

Katsuaki Natori, Yokohama, JP;

Masayuki Tanaka, Yokohama, JP;

Katsuyuki Sekine, Yokohama, JP;

Hirokazu Ishida, Yokohama, JP;

Masumi Matsuzaki, Yokohama, JP;

Yoshio Ozawa, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
Abstract

There is disclosed a semiconductor device including a plurality of memory cell transistors, each memory cell transistor including a floating gate electrode isolated from each other via an isolation insulating film every memory cell transistor, an inter-electrode insulating film comprising a HfAlOfilm (0.8≦x≦0.95) formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein the memory cell transistors are arrayed to form a memory cell array.


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