The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2010
Filed:
Dec. 13, 2007
Applicant:
Noriaki Mikasa, Tokyo, JP;
Inventor:
Noriaki Mikasa, Tokyo, JP;
Assignee:
Elpida Memory, Inc., Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract
A fin-channel recess-gate MISFET has a fin channel including a first portion configured by a portion of a silicon substrate and a second portion configured by a pair of silicon layers selectively grown on the silicon substrate. The first portion is disposed below the recess of the recess gate and above an isolation film of a STI structure formed on the silicon substrate. The second portion is disposed above the recess of the recess gate.
Mikasa, Noriaki. (2010). Semiconductor device including a fin-channel recess-gate misfet (U.S. Patent No. 7705401). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7705401
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile