The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2010

Filed:

Jul. 16, 2007
Applicants:

Junichi Kimura, Aichi, JP;

Yoshitsugu Uenishi, Nara, JP;

Masanori Sadano, Aichi, JP;

Yoshihisa Maehata, Gifu, JP;

Nobuhiro Tada, Osaka, JP;

Inventors:

Junichi Kimura, Aichi, JP;

Yoshitsugu Uenishi, Nara, JP;

Masanori Sadano, Aichi, JP;

Yoshihisa Maehata, Gifu, JP;

Nobuhiro Tada, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a module, formed of a semiconductor element flip-chip bonded to a substrate and chip component soldered to the substrate, is disclosed. The method includes a step of mounting the chip component and the semiconductor element to the substrate, a first injection step for injecting first resin from a center of a lateral face of the semiconductor element into a gap between the semiconductor element and the substrate, a second injection step for applying second resin having a greater viscosity than the first resin to corners of the semiconductor element before the first resin reaches the corners, and a curing step for heating the module. This method allows mounting the chip component closer to the semiconductor element, so that the component can be mounted at a higher density on the module.


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