The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7704126 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 27, 2010

Filed:

May. 04, 2007
Applicants:

Joachim Mattes, Burghausen, DE;

Anton Huber, Burghausen, DE;

Joerg Moser, Unterneukirchen, DE;

Inventors:

Joachim Mattes, Burghausen, DE;

Anton Huber, Burghausen, DE;

Joerg Moser, Unterneukirchen, DE;

Assignee:

Siltronic AG, Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B24B 9/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

Semiconductor wafers with profiled edges, are produced with decreased losses due to edge or other damage by separating a semiconductor wafer from a crystal; profiling the edge in a profile producing step wherein the edge is mechanically machined to a profile that is true to scale with respect to a predefined target profile; mechanically machining the wafer to reduce the a thickness of the semiconductor wafer; and machining the edge profile to acquire the target profile.


Find Patent Forward Citations

Mattes, Joachim. (2010). Method for producing a semiconductor wafer with profiled edge (U.S. Patent No. 7704126). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7704126

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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