The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2010

Filed:

Jan. 23, 2007
Applicant:

Frank Parrish, Simi Valley, CA (US);

Inventor:

Frank Parrish, Simi Valley, CA (US);

Assignee:

Teradyne, Inc., North Reading, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor wafer prober is configured to rotate a semiconductor wafer into relative alignment with a wafer-interface probe adapted to simultaneously probe a number of integrated circuits within a sector of the semiconductor wafer. The wafer can include integrated circuits having different orientations, such that all of the integrated circuits within a given sector being tested have the same orientation. For example, a semiconductor wafer can include two semicircular sectors, with the integrated circuits on either sector having a common orientation rotated 180 degrees from a common orientation of the integrated circuits of the other sector. A wafer-interface probe, or probe card, adapted to test the entire semicircular sector during a single touch down is able to test the entire wafer with one rotational translation between testing.


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