Method and system for switching between two (or more) reference signals for clock synchronization

Abstract

An apparatus and method is disclosed for synchronizing a timing signal for a computational system to different reference clock signals without impairing the operation of the computational system. A corresponding 'offset' register is provided for each of the reference clock signals (RCS) for storing signal timing differences between the timing signal and RCS. When one of the reference clock signals not used for synchronizing the timing signal, is selected as the signal for synchronizing the timing signal, the corresponding offset register R(for the newly selected reference clock signals) retains its last value prior to the switch, and another register Rstores subsequent signal timing differences between the timing signal and the newly selected reference clock signals. To synchronize the timing signal with the new reference clock signal without distorting the timing signal and impairing the operation of the computation system, differences between Rand Rare output (for successive time intervals) for iteratively adjusting the timing signals. The contents of the offset register Ris incrementally changed toward a predetermined value (i.e., zero) thereby gradually adjusting the timing signals to factor in a potentially large timing change when switching between reference clock signals.