The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2010

Filed:

Jul. 01, 2008
Applicants:

Igor Peidous, Fishkill, NY (US);

Linda R. Black, Wappingers Falls, NY (US);

Frank Wirbeleit, Dresden, DE;

Inventors:

Igor Peidous, Fishkill, NY (US);

Linda R. Black, Wappingers Falls, NY (US);

Frank Wirbeleit, Dresden, DE;

Assignee:

Advanced Micro Devices, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/74 (2006.01);
U.S. Cl.
CPC ...
Abstract

A stressed MOS device is provided that includes a silicon substrate, a gate electrode and an epitaxial layer of stress inducing monocrystalline semiconductor material. The silicon substrate is characterized by a monocrystalline silicon lattice constant. The gate electrode overlies a silicon channel region at the surface of the silicon substrate. The epitaxial layer of stress inducing monocrystalline semiconductor material is grown in the silicon substrate. The epitaxial layer of stress inducing monocrystalline semiconductor material has a lattice constant greater than the monocrystalline silicon lattice constant, and extends under the silicon channel region.


Find Patent Forward Citations

Peidous, Igor. (2010). Stressed mos device (U.S. Patent No. 7696534). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7696534

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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