The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 2010
Filed:
Jan. 04, 2007
Lars Dreeskornfeld, Dresden, DE;
Franz Hofmann, Munich, DE;
Johannes Richard Luyken, Munich, DE;
Michael Specht, Munich, DE;
Lars Dreeskornfeld, Dresden, DE;
Franz Hofmann, Munich, DE;
Johannes Richard Luyken, Munich, DE;
Michael Specht, Munich, DE;
Infineon Technologies AG, Munich, DE;
Abstract
The present invention provides a FinFET transistor arrangement produced using a method with the steps: providing a substrate (); forming an active region () on the substrate a fin-like channel region (″). Formation of the fin-like channel region (″) has the following steps: forming a hard mask (S-S) on the active region (); anisotropic etching of the active region () using the hard mask (S-S) forming STI trenches (G-G) having an STI oxide filling (); polishing-back of the STI oxide filling (); etching-back of the polished-back STI oxide filling (); selective removal of components of the hard mask forming a modified hard mask (S-S); anisotropic etching of the active region () using the modified hard mask (S-S) forming widened STI trenches (G-G'), the fin-like channel regions (″) of the active region () remaining for each individual FinFET transistor.