The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2010
Filed:
Jan. 25, 2006
Jonathan Park, San Jose, CA (US);
Yit Ping Kok, Raub, MY;
Soon Chieh Lim, Gelutor, MY;
Yin Hao Liew, Bayan Lepas, MY;
Wai Leng Chek, Gelutor, MY;
Jonathan Park, San Jose, CA (US);
Yit Ping Kok, Raub, MY;
Soon Chieh Lim, Gelutor, MY;
Yin Hao Liew, Bayan Lepas, MY;
Wai Leng Chek, Gelutor, MY;
eASIC Corporation, Santa Clara, CA (US);
Abstract
A method for verifying library components and designs on a via customizable ASIC, which may include the process of adding capacitors to model possible via sites of a model of an un-customized portion of or a whole ASIC, and replacing the capacitors with resistors to model where custom vias have been placed on the ASIC to implement a desired component or design. Views of this model may then be generated to verify the functionality of the component or design, and component models for timing, function and via customization may then be generated for the component library.