The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2010

Filed:

Feb. 24, 2007
Applicants:

David White, San Jose, CA (US);

Roland Ruehl, San Carlos, CA (US);

Mathew Koshy, San Mateo, CA (US);

Inventors:

David White, San Jose, CA (US);

Roland Ruehl, San Carlos, CA (US);

Mathew Koshy, San Mateo, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 19/00 (2006.01); G01R 31/02 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and systems for the integration of models and accurate predictions to score the circuit design, which translates to a more accurate and less complex yield prediction. In the present inventive approach, the computer-implemented methods and systems use at least one processor that is configured for performing at least predicting a physical realization of a layout design based at least in part on one or more model parameters, determining one or more hotspots associated with the layout design, determining a score for each of the one or more hotspots associated with the layout design, and categorizing the one or more hotspots according to at least the score in some embodiments. In some embodiments, the methods or the systems further use at least one processor for the act of determining one or more hotspots by using at least the design intent or the manufacturing information.


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