The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 2010
Filed:
May. 11, 2007
Yasuhiro Takai, Tokyo, JP;
Yasuhiro Takai, Tokyo, JP;
Elpida Memory, Inc., Tokyo, JP;
Abstract
Disclosed is a semiconductor memory device, in which the refresh period of a fail cell or cells is set so as to be shorter than that of the normal cells, comprises a control circuit for exercising control in such a manner that, if, when refreshing the cell of a first address, generated responsive to a refresh command, with an input control signal being of a first value, a second address, differing as to the value of a predetermined bit from the first address, is determined to correspond to a fail cell, based on the information ore-programmed in a refresh redundant ROM, the cell of the second address is refreshed, and also in such a manner that, if, with the input control signal of a second value, the second address, differing as to the value of a predetermined bit from the first address, is determined to correspond to a fail cell, based on the predetermined information, only the cell of the second address is refreshed, without refreshing the cell of the first address, generated responsive to the refresh command.