The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2010

Filed:

Dec. 27, 2007
Applicants:

Yong-soo Kim, Ichon-shi, KR;

Hong-seon Yang, Ichon-shi, KR;

Seung-ho Pyi, Ichon-shi, KR;

Tae-hang Ahn, Ichon-shi, KR;

Inventors:

Yong-Soo Kim, Ichon-shi, KR;

Hong-Seon Yang, Ichon-shi, KR;

Seung-Ho Pyi, Ichon-shi, KR;

Tae-Hang Ahn, Ichon-shi, KR;

Assignee:

Hynix Semiconductor Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a transistor, the method includes forming a gate over a substrate to form a first resultant structure, forming a gate spacer at first and second sidewalls of the gate, etching portions of the substrate proximate to the gate spacer to form a recess in a source/drain region of the substrate, forming a first epitaxial layer including germanium to fill the recess, and performing a high temperature oxidation process to form a second epitaxial layer including germanium over an interfacial layer between the substrate and the first epitaxial layer, the second epitaxial layer having a germanium concentration that is higher than a germanium concentration of the first epitaxial SiGe layer, thereby forming a second resultant structure.


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