The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 2010
Filed:
Oct. 24, 2005
Applicants:
Brian Gaide, Austin, TX (US);
Xiaojie He, Austin, TX (US);
Inventors:
Brian Gaide, Austin, TX (US);
Xiaojie He, Austin, TX (US);
Assignee:
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/38 (2006.01); G06F 7/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
In one embodiment of the invention, programmable circuits, such as FPGAs, may be used to implement different types of functions, such as a multi-bit adder, using look-up table (LUT) circuits as their building blocks. Efficient generation of carry-out signals and fast-carry generation signals using available SRAM cells in the various embodiments of the LUT circuit can reduce and/or eliminate area-inefficient look-ahead carry logic without a significant delay in signal generation.