The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2010

Filed:

Oct. 06, 2006
Applicant:

Giuseppe Rossi, Pasadena, CA (US);

Inventor:

Giuseppe Rossi, Pasadena, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A new capacitor architecture includes a front plate of the capacitor formed from a first polysilicon layer. The front plate is surrounded by a first dielectric layer and a second dielectric layer. The back plate of the capacitor is formed from one layer of a first two-layer conductive structure which surrounds the first dielectric layer and the second dielectric layer. The two-layer conductive structure is an equal potential structure and includes a conductive coupling between the two layers.


Find Patent Forward Citations

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Rossi, Giuseppe. (2010). Capacitor layout technique for reduction of fixed pattern noise in a cmos sensor (U.S. Patent No. 7681163). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7681163

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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