The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2010

Filed:

Mar. 07, 2007
Applicants:

Michael D. Turner, San Antonio, TX (US);

Suresh Venkatesan, Austin, TX (US);

Kurt H. Junker, Austin, TX (US);

Inventors:

Michael D. Turner, San Antonio, TX (US);

Suresh Venkatesan, Austin, TX (US);

Kurt H. Junker, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for imparting stress to the channel region of a transistor is provided. In accordance with the method, a semiconductor layer () is provided which has a dielectric layer () disposed beneath it. A trench () is created which extends through the semiconductor layer and into the dielectric layer, and the trench is backfilled with a stressor material (), thereby forming a trench isolation structure. A channel region () is defined in the semiconductor layer adjacent to the trench isolation structure.


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