The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 2010
Filed:
Oct. 03, 2006
John S. Foster, Santa Barbara, CA (US);
Steven H. Hovey, Goleta, CA (US);
Paul J. Rubel, Santa Barbara, CA (US);
Kimon Rybnicek, Santa Barbara, CA (US);
John S. Foster, Santa Barbara, CA (US);
Steven H. Hovey, Goleta, CA (US);
Paul J. Rubel, Santa Barbara, CA (US);
Kimon Rybnicek, Santa Barbara, CA (US);
Innovative Micro Technology, Goleta, CA (US);
Abstract
A device and a method are described which hermetically seals at least one microstructure within a cavity. Electrical access to the at least one microstructure is provided by through wafer vias formed through a via substrate which supports the at least one microstructure on its front side. The via substrate and a lid wafer may form a hermetic cavity which encloses the at least one microstructure. The through wafer vias are connected to bond pads located outside the cavity by an interconnect structure formed on the back side of the via substrate. Because they are outside the cavity, the bond pads may be placed inside the perimeter of the bond line forming the cavity, thereby greatly reducing the area occupied by the device. The through wafer vias also shorten the circuit length between the microstructure and the interconnect, thus improving heat transfer and signal loss in the device.