The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2010

Filed:

Jul. 03, 2007
Applicants:

Siva G. Narendra, Portland, OR (US);

James W. Tschantz, Portland, OR (US);

Howard A. Wilson, Beaverton, OR (US);

Donald S. Gardner, Moutain View, CA (US);

Peter Hazucha, Beaverton, OR (US);

Gerhard Schrom, Hillsboro, OR (US);

Tanay Karnik, Portland, OR (US);

Nitin Borkar, Portland, OR (US);

Vivek K. DE, Beaverton, OR (US);

Shekhar Y. Borkar, Beaverton, OR (US);

Inventors:

Siva G. Narendra, Portland, OR (US);

James W. Tschantz, Portland, OR (US);

Howard A. Wilson, Beaverton, OR (US);

Donald S. Gardner, Moutain View, CA (US);

Peter Hazucha, Beaverton, OR (US);

Gerhard Schrom, Hillsboro, OR (US);

Tanay Karnik, Portland, OR (US);

Nitin Borkar, Portland, OR (US);

Vivek K. De, Beaverton, OR (US);

Shekhar Y. Borkar, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.


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