The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2010
Filed:
Dec. 13, 2006
James K. Falbo, San Jose, CA (US);
Vinod K. Malhotra, San Jose, CA (US);
Pratheep Balasingam, San Jose, CA (US);
Donald Zulch, Santa Clara, CA (US);
James K. Falbo, San Jose, CA (US);
Vinod K. Malhotra, San Jose, CA (US);
Pratheep Balasingam, San Jose, CA (US);
Donald Zulch, Santa Clara, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A shape-based layout beautification operation can be performed on an IC layout to correct layout imperfections. A shape is described by edges (and vertices) related according to specified properties. Each shape can be configured to match specific layout imperfection types. Corrective actions can then be associated with the shapes, advantageously enabling efficient formulation and precise application of those corrective actions. Corrective actions can include absolute, adaptive, or replacement-type modifications to the detected layout imperfections. A concurrent processing methodology can be used to minimize processing overhead during layout beautification, and the actions can also be incorporated into a lookup table to further reduce runtime. A layout beautification system can also be connected to a network across which shapes, actions, and IC layout data files can be accessed and retrieved.