The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7663908 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 16, 2010

Filed:

Mar. 12, 2007
Applicants:

Hank Cheng, Taichung, TW;

Chen-hui Hsieh, Chu-Pei, TW;

Chung-cheng Chou, Hsin-Chu, TW;

Inventors:

Hank Cheng, Taichung, TW;

Chen-Hui Hsieh, Chu-Pei, TW;

Chung-Cheng Chou, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/24 (2006.01);
U.S. Cl.
CPC ...
Abstract

The disclosure generally relates to a method and apparatus for decreasing the frequency of refreshing a memory cell in communication with a word line and a bit line. A method according to one embodiment includes: providing a DRAM circuit having a memory cell, a sense amplifier including a pre-charge circuit connected to a first voltage source and a back-to-back inverter including a first NMOS transistor having a source, a second NMOS transistor having a source, a first PMOS transistor having a source and a second PMOS transistor having a source; maintaining the voltage of the sources of the first and second PMOS transistors at a first voltage during normal operation; and raising the voltage of the sources of the first and second PMOS transistors from the first voltage to a second voltage during a refresh operation.


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Cheng, Hank. (2010). Method for increasing retention time in dram (U.S. Patent No. 7663908). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7663908

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