The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2010

Filed:

Dec. 21, 2007
Applicant:

Tatsuya Matano, Tokyo, JP;

Inventor:

Tatsuya Matano, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

In order to resolve a problem of the conventional technique in which there is a charge pump capacitance which is not used when a boosting method of the charge pump is changed, in a charge pump circuit unit, a connection switching terminal selects a power source voltage, a logically-inverting buffer gate and a capacitor to conduct an operation of boosting the power source voltage so as to be twice the power source voltage, and a connection switching terminal outputs the boosted voltage as a boost control voltage. In a charge pump circuit unit, a connection switching terminal selects the boost control voltage outputted from the charge pump circuit unit, and a logically-inverting buffer gate and a capacitor conduct an operation of boosting the inputted voltage so as to be 3×VDD. An internal voltage is generated by outputting the boosted voltage to an internal power line via a NMOS transistor.


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