The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2010

Filed:

Aug. 08, 2005
Applicants:

Boris Prokopenko, Milpitas, CA (US);

Timour Paltashev, Fremont, CA (US);

Inventors:

Boris Prokopenko, Milpitas, CA (US);

Timour Paltashev, Fremont, CA (US);

Assignee:

VIA Technologies, Inc., Hsin-Tien, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01); G06F 15/16 (2006.01); G09G 5/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A dynamically scheduled parallel graphics processor comprises a spreader that creates graphic objects for processing and assigns and distributes the created objects for processing to one or more execution blocks. Each execution block is coupled to the spreader and receives an assignment for processing a graphics object. The execution block pushes the object through each processing stage by scheduling the processing of the graphics object and executing instruction operations on the graphics object. The dynamically scheduled parallel graphics processor includes one or more fixed function units coupled to the spreader that are configured to execute one or more predetermined operations on a graphics object. An input/output unit is coupled to the spreader, the one or more fixed function units, and the plurality of execution blocks and is configured to provide access to memory external to the dynamically scheduled parallel graphics processor.


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