The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 2010
Filed:
Jun. 07, 2007
Tetsuharu Tanoue, Tokyo, JP;
Tetsuharu Tanoue, Tokyo, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
Performing electrolysis plating to a wiring is made possible, aiming at the increasing of pin count of a semiconductor device. Package substrateby which ring shape common wiringp for electric supply was formed in the inner area of bonding leadj in device regionv of main surfacea is used. Since a plurality of first plating linesr and fourth plating linesu for electric supply connected to common wiringp can be arranged by this, the feeder for electrolysis plating can be arranged to all the land parts on the back. Hereby, it becomes possible to perform electrolysis plating to the wiring of main surfacea of package substrate, and the back surface. Even if the land part of plural lines is formed covering the perimeter of the back surface, electrolysis plating can be performed to the all land parts. As a result, electrolysis plating can be performed to a wiring, aiming at the increasing of pin count of a semiconductor device.