The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2010

Filed:

Jun. 22, 2006
Applicants:

Shyam Chandra, Portland, OR (US);

OM Agrawal, Los Altos, CA (US);

Ludmil Nikolov, Chippenham, GB;

Harald Weller, Romsey, GB;

Douglas Morse, Bath, GB;

Inventors:

Shyam Chandra, Portland, OR (US);

Om Agrawal, Los Altos, CA (US);

Ludmil Nikolov, Chippenham, GB;

Harald Weller, Romsey, GB;

Douglas Morse, Bath, GB;

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment of the invention, a clock distribution (CD) chip has one or more input pins, input buffer circuitry, clock generation and distribution circuitry, fanout circuitry, one or more output pins, a feedback pin, and feedback buffer circuitry. Based on single-ended or differential input clock signals applied to the input pins, the CD chip can be programmably configured to generate zero, one, or more zero-delay (ZD) output clock signals and zero, one, or more non-zero-delay (NZD) output clock signals for simultaneous presentation at the output pins.


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