The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2010

Filed:

Apr. 01, 2009
Applicants:

Prabha Jairam, Fremont, CA (US);

Himanshu J. Verma, San Jose, CA (US);

Inventors:

Prabha Jairam, Fremont, CA (US);

Himanshu J. Verma, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A test circuit in an integrated circuit and method of testing therewith are described. A test pattern generator provides a test pattern. A reference circuit includes a first sequential circuit coupled in series with a second sequential circuit. A circuit under test is coupled between a source sequential circuit and a destination sequential circuit to form a series. The source sequential circuit and the first sequential circuit are coupled to the test pattern generator to receive the test pattern. A comparison circuit is coupled to receive a first output from the destination sequential circuit and a second output from the second sequential circuit. The comparison circuit is configured to compare the first output with the second output to provide a signature output.


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