The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 26, 2010
Filed:
Aug. 25, 2006
Edouard D. DE Frésart, Tempe, AZ (US);
Robert W. Baird, Gilbert, AZ (US);
Edouard D. de Frésart, Tempe, AZ (US);
Robert W. Baird, Gilbert, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
Semiconductor structures (---) and methods (-) are provided for a semiconductor devices employing strained () and relaxed () semiconductors, The method comprises, forming () on a substrate () first (-) and second (-) regions of a first semiconductor material () of a first conductivity type and a first lattice constant spaced apart by a gap or trench (), filling () the trench or gap () with a second semiconductor material () of a second, conductivity type and a second different lattice constant so that the second semiconductor material () is strained with respect to the first semiconductor material () and forming () device regions (, S, G, D) communicating with the first () and second () semiconductor materials and adapted to provide device current () through at least part of the strained second semiconductor material () in the trench (). In a preferred embodiment, the relaxed semiconductor material isSi:Ge and the strained semiconductor material is substantially Si.