The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2010

Filed:

Oct. 03, 2002
Applicants:

Tetsuo Shimomura, Ohtsu, JP;

Masahiko Nakamori, Ohtsu, JP;

Takatoshi Yamada, Ohtsu, JP;

Takashi Masui, Ohtsu, JP;

Shigeru Komai, Ohtsu, JP;

Koichi Ono, Ohtsu, JP;

Kazuyuki Ogawa, Osaka, JP;

Atsushi Kazuno, Osaka, JP;

Tsuyoshi Kimura, Osaka, JP;

Hiroshi Seyanagi, Osaka, JP;

Inventors:

Tetsuo Shimomura, Ohtsu, JP;

Masahiko Nakamori, Ohtsu, JP;

Takatoshi Yamada, Ohtsu, JP;

Takashi Masui, Ohtsu, JP;

Shigeru Komai, Ohtsu, JP;

Koichi Ono, Ohtsu, JP;

Kazuyuki Ogawa, Osaka, JP;

Atsushi Kazuno, Osaka, JP;

Tsuyoshi Kimura, Osaka, JP;

Hiroshi Seyanagi, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B 3/26 (2006.01); B32B 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention provides a polishing pad by which optical materials such as lenses, reflecting mirrors etc., or materials requiring a high degree of surface planarity, as in the polishing of silicone wafers, glass substrates or aluminum substrates for hard disks, or general metal polishing, can be flattened with stability and high polishing efficiency. The invention also provides a polishing pad for semiconductor wafers, which is superior in planarizing characteristic, is free from scratches and can be produced at low cost. There is provided a polishing pad which is free from dechucking error so that neither damage to wafers nor decrease in operating efficiency occurs. There is provided a polishing pad which is satisfactory in planarity, within wafer uniformity, and polishing rate and produces less change in polishing rate. There is provided a polishing pad which can make planarity improvement and scratch decrease compatible.


Find Patent Forward Citations

Loading…