The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 2010
Filed:
Sep. 06, 2006
Greg A. Dyck, Morgan Hill, CA (US);
Charles W. Gainey, Poughkeepsie, NY (US);
Jeffrey P. Kubala, Poughquag, NY (US);
James H. Mulder, Wappingers Falls, NY (US);
Damian L. Osisek, Vestal, NY (US);
Robert R. Rogers, Beacon, NY (US);
Mark A. Wisniewski, Wappingers Falls, NY (US);
Leslie W. Wyman, Poughkeepsie, NY (US);
Greg A. Dyck, Morgan Hill, CA (US);
Charles W. Gainey, Poughkeepsie, NY (US);
Jeffrey P. Kubala, Poughquag, NY (US);
James H. Mulder, Wappingers Falls, NY (US);
Damian L. Osisek, Vestal, NY (US);
Robert R. Rogers, Beacon, NY (US);
Mark A. Wisniewski, Wappingers Falls, NY (US);
Leslie W. Wyman, Poughkeepsie, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method is provided for determining whether a logical processor of an information processing system has access to an address space of the information processing system. An instruction is issued by a first processor, the instruction referencing a target logical processor and a target address space. In response to the instruction, first information is checked to determine whether the target logical processor is running. When it is determined that the target logical processor is not running, second information is checked by a host program to determine whether the target logical processor has access to the target address space.