The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2010

Filed:

Oct. 28, 2005
Applicants:

Kojiro Kameyama, Gunma, JP;

Akira Suzuki, Gunma, JP;

Mitsuo Umemoto, Gunma, JP;

Inventors:

Kojiro Kameyama, Gunma, JP;

Akira Suzuki, Gunma, JP;

Mitsuo Umemoto, Gunma, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

The first pad electrode layer is disposed on the surface of the semiconductor substrate with the first insulating film between them. Then, the second insulating film with the first via hole partially exposing the first pad electrode layer is formed over the first pad electrode layer. The plug is formed in the first via hole in the next process. The second pad electrode layer connected to the plug is disposed on the second insulating film. Next, the second via hole reaching to the first pad electrode layer from the backside of the semiconductor substrate is formed. The penetrating electrode and the second wiring layer connected to the first pad electrode layer at the bottom part of the second via hole are disposed. Furthermore, the protecting layer and the conductive terminal are formed. Finally, the semiconductor substrate is diced into the semiconductor chips.


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