The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2010

Filed:

Mar. 15, 2006
Applicants:

Han-mei Choi, Seoul, KR;

Kyoung-ryul Yoon, Gyeonggi-do, KR;

Seung-hwan Lee, Seoul, KR;

Ki-yeon Park, Gyeonggi-do, KR;

Young-sun Kim, Gyeonggi-do, KR;

Inventors:

Han-Mei Choi, Seoul, KR;

Kyoung-Ryul Yoon, Gyeonggi-do, KR;

Seung-Hwan Lee, Seoul, KR;

Ki-Yeon Park, Gyeonggi-do, KR;

Young-Sun Kim, Gyeonggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a gate structure of a non-volatile memory device is formed, a tunnel insulating layer and a charge trapping layer are formed on a substrate. A composite dielectric layer is formed on the charge trapping layer and has a laminate structure in which first material layers including aluminum oxide and second material layers including hafnium oxide or zirconium oxide are alternately stacked. A conductive layer is formed on the composite dielectric layer and then a gate structure is formed by patterning the conductive layer, the composite dielectric layer, the charge trapping layer, and the tunnel insulating layer.


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