The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 2010
Filed:
Feb. 06, 2004
Glen C. Shepherd, Austin, TX (US);
Anthony Aaron Lynn Burton, Sunnyvale, CA (US);
Michael Ryan NG, Burlingame, CA (US);
Mimi Munson Tantillo, San Jose, CA (US);
Dieu-huong Nguyen Tran, Santa Clara, CA (US);
Glen C. Shepherd, Austin, TX (US);
Anthony Aaron Lynn Burton, Sunnyvale, CA (US);
Michael Ryan Ng, Burlingame, CA (US);
Mimi Munson Tantillo, San Jose, CA (US);
Dieu-Huong Nguyen Tran, Santa Clara, CA (US);
Solectron Corporation, Milpitas, CA (US);
Cisco Technology, Inc., San Jose, CA (US);
Abstract
This invention relates to a substrate with via and pad structure(s) to reduce solder wicking. Each via and pad structure connects a component to conductive layers associated with the substrate. The substrate includes one or more plated vias, solder mask(s) surrounding the plated vias, and a conductive pad with a conductive trace connected to each plated via. The conductive pad extends beyond the terminal sides to increase solder formation and the solder mask reduces solder formation at the terminal end of the component. The via and pad structure is suitable for a variety of components and high component density. The invention also provides a computer implemented method for calculating the maximum distance of a conductive pad extending beyond the terminal side of a component.