The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 2010
Filed:
Oct. 28, 2004
Sakae Koyata, Tokyo, JP;
Kazushige Takaishi, Tokyo, JP;
Sakae Koyata, Tokyo, JP;
Kazushige Takaishi, Tokyo, JP;
SUMCO Corporation, Tokyo, JP;
Abstract
The manufacturing method of the present invention provides a silicon wafer, both sides of the wafer having a highly accurate flatness and small surface roughness, which is a single surface mirror-polished wafer with the front and rear surfaces of the wafer identifiable by visual observation, and excellent in flatness when held by a stepper chuck and the like. The manufacturing method of the present invention includes an etching process, a lapping process, and a double surface polishing process to simultaneously polish the front and rear surfaces of a wafer after the etching process. The polishing removal depth (A) of the wafer front surface is 5 to 10 μm in the double surface simultaneous polishing process, and the polishing removal depth (B) in the rear surface is 2 to 6 μm, and a difference between the polishing removal depth A and the polishing removal depth B is 3 to 4 μm.