The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 05, 2010
Filed:
Jan. 29, 2008
Ching-te K. Chuang, South Salem, NY (US);
Jae-joon Kim, Austin, TX (US);
Tae-hyoung Kim, St. Paul, MN (US);
Pong-fei LU, Yorktown Heights, NY (US);
Saibal Mukhopadhyay, Atlanta, GA (US);
Rahul M. Rao, Elmsford, NY (US);
Shao-yi Wang, Fremont, CA (US);
Ching-Te K. Chuang, South Salem, NY (US);
Jae-Joon Kim, Austin, TX (US);
Tae-Hyoung Kim, St. Paul, MN (US);
Pong-Fei Lu, Yorktown Heights, NY (US);
Saibal Mukhopadhyay, Atlanta, GA (US);
Rahul M. Rao, Elmsford, NY (US);
Shao-yi Wang, Fremont, CA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A ring oscillator has an odd number of NOR-gates greater than or equal to three, each with first and second input terminals, a voltage supply terminal, and an output terminal. The first input terminals of all the NOR-gates are interconnected, and each of the NOR-gates has its output terminal connected to the second input terminal of an immediately adjacent one of the NOR-gates. During a stress mode, a voltage supply and control block applies a stress enable signal to the interconnected first input terminals, and an increased supply voltage to the voltage supply terminals. During a measurement mode, this block grounds the interconnected first input terminals, and applies a normal supply voltage to the voltage supply terminals. Also included are an analogous NAND-gate based circuit, a circuit combining the NAND- and NOR-aspects, a circuit with a ring oscillator where the inverters may be coupled directly or through inverting paths, and circuits for measuring the bias temperature instability effect in pass gates.