Transistors with recessed active trenches for increased effective gate width

Abstract

A method of manufacturing a semiconductor device having recessed active trenches by providing a substrate with STI and active regions, forming a first oxide layer on the substrate, forming an nitride layer on the first oxide layer, employing a photolithographic process to create at least one recessed active trench through the first oxide layer and the nitride layer and into the substrate to create an isolation region, wherein the at least one trench is perpendicular to at least one gate structure in an active area of the substrate, layering the trench with a second oxide layer, removing the first oxide layer and second oxide layer, forming a third oxide layer on the planar substrate with recessed active trench, and forming the at least one circuitous gate structure on the third oxide layer connecting at least one electronic source and drain.