The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2009
Filed:
Apr. 23, 2007
Katsura Miyashita, Fujisawa, JP;
Hisao Yoshimura, Kawasaki, JP;
Mariko Takagi, Kawasaki, JP;
Kabushiki Kaisha Toshiba, Tokyoo, JP;
Abstract
The present invention provides a semiconductor device, comprising a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, and source-drain diffusion layer formed within the semiconductor substrate in the vicinity of the gate electrode. A silicide film is formed on each of the gate electrode and the source-drain diffusion layer. The silicide film positioned on the gate electrode is thicker than the silicide film positioned on the source-drain diffusion layer. The present invention also provides a method of manufacturing a semiconductor device, in which a gate electrode is formed on a gate insulating film covering a semiconductor substrate, followed by forming a source-drain diffusion layer within the semiconductor substrate. Then, atoms inhibiting a silicidation are selectively introduced into the source-drain diffusion layer, followed by forming a film of a metal having a high melting point on each of the gate electrode and the source-drain diffusion layer. The film of the high melting point metal is converted into a silicide film to form silicide films selectively on the gate electrode and the source-drain diffusion layer. The particular method permits retarding the formation of the silicide film on the source-drain diffusion layer so as to make it possible to obtain a semiconductor device of a salicide structure in which the silicide film formed on the gate electrode is thicker than the silicide film formed on the source-drain diffusion layer.