The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2009
Filed:
Jan. 15, 2007
Se-young Jeong, Chungcheongnam-do, KR;
Nam-seog Kim, Gyeonggi-do, KR;
Cha-jea JO, Gyeonggi-do, KR;
Jong-ho Lee, Chungcheongnam-do, KR;
Myeong-soon Park, Seoul, KR;
Se-Young Jeong, Chungcheongnam-do, KR;
Nam-Seog Kim, Gyeonggi-do, KR;
Cha-Jea Jo, Gyeonggi-do, KR;
Jong-Ho Lee, Chungcheongnam-do, KR;
Myeong-Soon Park, Seoul, KR;
Samsung Electronics Co., Ltd., Gyeonggi-Do, KR;
Abstract
Provided is a stacked chip package and a method for forming the same. A spacer is formed on a side of an upper chip. A conductive line is formed on the spacer to electrically connect upper and lower chips. The reliability of the stacked chip package is improved because wire bonding is not used to electrically connect the upper and lower chips. Further, the overall size of the stacked chip package can be reduced as the height of bonding wire loops does not contribute to the overall stacked chip package height.