The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 22, 2009

Filed:

Jul. 25, 2005
Applicants:

Qi Wang, West Jordan, UT (US);

Minhua LI, Sandy, UT (US);

Jeffrey H. Rice, South Jordan, UT (US);

Inventors:

Qi Wang, West Jordan, UT (US);

Minhua Li, Sandy, UT (US);

Jeffrey H. Rice, South Jordan, UT (US);

Assignee:

Fairchild Semiconductor Corporation, South Portland, ME (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/30 (2006.01); H01L 21/46 (2006.01);
U.S. Cl.
CPC ...
Abstract

Processes used to transfer semiconductor structures from an initial substrate to a base substrate include bonding the initial substrate with a silicon dioxide layer to a doped silicon structure weakened sufficiently by hydrogen implantation for cleaving. After cleaving, a doped silicon layer remains, burying the silicon dioxide layer between the doped silicon layer and the initial substrate. Semiconductor structures are formed within/on an epitaxial layer disposed on the doped silicon layer forming an intermediate semiconductor structure. A process handle is temporarily bonded to the semiconductor structures for support. The initial substrate is thinned and removed by a mechanical thinning process followed by chemical etching using the buried silicon dioxide layer as an etch stop. The silicon dioxide layer is chemically removed from the doped silicon layer. A base substrate is formed on the doped silicon layer. The process handle is removed leaving the semiconductor structures disposed on the base substrate.


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